During SC15 show held in Austin, Texas, Intel has unveiled its second-generation Xeon Phi co-processor, codename Knights Landing. Packing 72 cores and 16GB of MCDRAM, the new Xeon Phi wil offer five times the bandwidth and be five times more power efficienct, which is quite important for workstation market Xeon Phi is aiming at.

According to known details, the Knights Landing (KNL) chip will feature 36 tiles connected via 2D Mesh interconnect. Each tile packs two cores, two VPU/core and 1MB of L2 cache, adding up to 72 cores and 36MB of L2 cache. According to details, each tile will have two Silvermont-based cores running at around 1.3GHz.

The Knights Landing chip will also have a total of 10 memory controllers, two for DDR4 memory, supporting three channels each and eight for 16GB of on-package high-bandwidth MCDRAM. The MCDRAM will offer 400+ GB/s of bandwidth. The two regular DDR4 controllers, will offer up to six channels with support for up to 384GB of DDR4-2400 memory.

According to Intel, the Knights Landing chip can deliver over 8 TFLOPS of single-precision and over 3TFLOPS of double-precision computing performance and is mostly designed for high parallel computing.

Intel notes that the first pre-production systems have been already shipped to clients and the company expects to officially launch it in Q1 2016.







Source: Intel.com.