Cache Hierachy and Clock Speeds

For the cache hierarchy we can see that NVIDIA didn't improve the L1 as well as the L2 cache. Every core gets 32KB/32KB L1 cache and all four cores share a 1 Megabyte L2 Cache. Using twice as many cores compared to the previous Tegra 2 but not increasing the L2 cache size means that NVIDIA obviously doesn't believe that there well be many applications out there making use of four cores. But nevertheless, regarding the L2 cache is now faster by two cycles on Tegra 3. For the L1 cache there is no such improvement.



Concerning the specifications there are also the clock frequencies. When only one performance core is in use then this one tops out at 1.4 Gigahertz. With Tegra 2 the maximum clock speed was 1.0 Gigahertz. When all four performance cores are active the maximum frequency is 1.3 Gigahertz. Furthermore the power gating feature allows the deactivation of every single core. Therefore Tegra 3 only drains more power than Tegra 2 when all for cores are under heavy load. In all the other scenarios it is more efficient than the predecessor. Furhtermore there is the companion core which clock at a maximum of 500 MHz. As already mentioned this one is being manufactured using TSMCs LP process. Therefore it is optimized for low power consumption.

Page 1 - Introduction

Page 2 - Less Leakage Power

Page 3 - Cache Hierarchie and Clock Speeds

Page 4 - Is it the right way to go?

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