Intel Core i7 - 965/920 - architecture and performance

Published by Jean-Luc Hadey on 03.11.08
Page:
« 1 2 3 (4) 5 6 7 ... 16 »


Microarchitecture design II

Resized Image


Nehalem is Intels first monolithic quad core CPU which comes with an integrated last level cache. A central queue connects the different cores with eachother and also the uncore region where the L3-cache, the integrated memory controller and the QPI links are located.

Through integrating the memory controller on to the CPU there is no more need of a Front-Side-Bus. Instead there now are QPI links (Quick Path Interconnect). Summarized QPI is a packet based point to point connection which provides high bandwidth and low latency. Best case up to 6.4 GT/s are possible. Every link is implmented as a 20 bit wide interface. QPI packets are 80 bit long and will be transmitted in 4 to 16 cycles. 16 of 80 bit are reserved for flow-control and CRC. The other 64 bit handle data. Every link is able to transfer 12.8 GB/s and because of the fact that QPI links are bi-directional 25.6 GB/s can be transferred. Nehalem will scale with the number of QPI links which will be determined by the targeted marketsegment.


Discuss this article in the forum.




comments powered by Disqus

Intel Core i7 - 965/920 - architecture and performance - CPUs Reviews - Reviews - ocaholic