Intel and Micron have formed a partnership, with the production and shipment of the first 4bits/cell 3D NAND technology this week. These upcoming NAND chips use the proven 64-layer structure and they have achieved 1 terabit (Tb) density per die. In other words, this chips come with the highest density flash memory currently available.


Alongside with the impressive cell NAND developments, Intel and Micron are also working on third-generation 96-tier 3D NAND structure. This new layout will provide more layers and it will put both companies at the forefront when it comes to NAND density. In this chips, we will see the "CMOS under the array" (CuA) technology that reduces the die size and allows for four planes instead two.

In other words, Intel and Micron can put more NAND cells in parallel and push on the speeds. We might see impressive throughput and more bandwidth. Furthermore, Intel can now offer denser storage in a smaller space and save several bucks in the process. According to Micron's VP of technology development Scott DeBoer, they are achieving 33% higher array density compared to TLC.




Source: PCworld