Although we are all still waiting for PCI-Express 4.0 to become available, the PCI-SIG has announced that they are working on the development of PCI-Express 5.0 which is designed to offer 128GB/s of total bandwidth. In other words the total bandwidth would increase by a factor of four compared to the current PCIe 3.0 in the case of a x16 configuration.


During the PCI-SIG Developers Conference 2017, the PCI-SIG consortium announced that the PCI-Express 5.0 specifications are to be finished in 2019. At the moment the PCI-SIG members are working on Revision 0.3. PCI-Express 5.0 will further increase the bandwidth of PCIe lanes, which in turn will allow vendors to create faster devices. It would for example be possible to create 400Gb/s Ethernet interfaces for the enterprise environment but also M.2 drives could benefit from the increased bandwidth. Maybe by then M.2 drives won’t require four PCIe lanes any more and two would already suffice, keeping in mind that PCIe 5.0 offers four times the bandwidth of PCIe 3.0 it would be possible to shovel 8GB/s through a PCIe x2 interface.

In over 25-year of history, the PCI-SIG has developed, thus provided the specifications for industry requirements. In a continuous effort to ensure that the industry moves on, the PCI Express 5.0 specifications are being developed although PCI Express 4.0 has not even made it to market yet.




Source: OC3D